1. Field of the Invention
The present invention relates to a semiconductor memory module and more particularly to a structure of a semiconductor memory module corresponding to a high speed operation.
2. Description of the Background Art
With an increase in a processing speed of a semiconductor device, a speed of a signal transmitted and received between semiconductor devices is also increased. In particular, a digital signal has short rise and fall times.
When the rise and fall times of the signal are shortened, a signal is easily distorted over a printed circuit board on which the semiconductor device is to be mounted. Examples of the distortion include the case in which an overshoot voltage and an undershoot voltage are raised, the case in which a signal waveform becomes step-shaped when the waveform is, raised to reach a predetermined level, and the like.
The case in which a plurality of semiconductor memory modules having a plurality of semiconductor memories provided thereon are mounted will be taken as an example. An output impedance of a driver circuit for outputting a signal to be input in common with the semiconductor memory modules is usually matched with a characteristic impedance of a transmission path through which the signal is transmitted. However, the impedances are mismatched between the driver circuit and the transmission path due to a parasitic capacitance and a parasitic inductance which are incidental to a branch line connected to each module of the transmission path, and the signal is reflected and is thereby distorted in some cases.
When the signal is reflected, an overshoot or an undershoot is liable to be generated on the signal waveform. When the overshoot voltage and the undershoot voltage are raised, ringing is generated correspondingly. When the ringing thus generated exceeds a threshold of a circuit for receiving the signal, a false signal is generated to cause sprious switching.
In the case in which the parasitic capacitance and the parasitic inductance have great values, the distortion is more increased. Also in the case in which there are a large number of branches on the same transmission path, the distortion is increased.
As described above, the processing speed of the semiconductor device is increased so that the mismatch of the impedances is caused between the driver circuit and the signal transmission path due to the parasitic capacitance and the parasitic inductance which are incidental to the transmission path. Consequently, the reflection of the signal is caused so that the signal is distorted. Thus, the overshoot and the undershoot are liable to be generated on the signal waveform.
In order to solve the above-mentioned problem, it is an object of the present invention to provide a semiconductor memory module capable of decreasing a parasitic capacitance and a parasitic inductance which are incidental to a signal transmission path, thereby reducing a distortion of a signal waveform.
A first aspect of the present invention is directed to a semiconductor memory module comprising a Wiring board, at least one semiconductor memory provided on at least one main surface of the wiring board and having a plurality of external terminals, a plurality of first board terminals and a plurality of second board terminals which are provided line symmetrically with respect to two opposed sides of the wiring board corresponding to the plurality of external terminals, respectively, and a wiring for electrically connecting one of the plurality of external terminals to one pair of the plurality of first and second board terminals corresponding thereto.
A second aspect of the present invention is directed to the semiconductor memory module, wherein the at least one semiconductor memory is a plurality of semiconductor memories, and the plurality of external terminals of the semiconductor memories and the plurality of first and second board terminals are provided in the same direction.
A third aspect of the present invention is directed to the semiconductor memory module, wherein the plurality of semiconductor memories are provided in a plurality of lines in parallel with each other.
A fourth aspect of the present invention is directed to the semiconductor memory module, wherein the wiring board has first and second main surfaces, the first main surface including a first group of semiconductor memories having at least one of the plurality of semiconductor memories, and the plurality of first and second board terminals corresponding to the plurality of external terminals of the first group of semiconductor memories and the wiring connecting the plurality of first and second board terminals provided on the first main surface, and the second main surface including a second group of semiconductor memories having at least one of the plurality of semiconductor memories, and the plurality of first and second board terminals corresponding to the plurality of external terminals of the second group of semiconductor memories and the wiring connecting the plurality of first and second board terminals provided on the second main surface.
A fifth aspect of the present invention is directed to a module system mounting a plurality of semiconductor memory modules according to the first aspect of the present invention, comprising at least one first connector for electrically connecting the semiconductor memory modules, and a base mounting the at least one first connector and the semiconductor memory modules connected to the at least one first connector, the at least one first connector having a connecting portion connecting the plurality of first and second board terminals to respective side surfaces of two sides parallel with a direction in which the first and second board terminals are arranged.
A sixth aspect of the present invention is directed to the module system, wherein the base has two second connectors fixedly provided on both ends in a direction of array of the plurality of semiconductor memory modules, at least one of the two second connectors being connected to any of the plurality of first and second board terminals in the plurality of semiconductor memory modules which is not connected to the at least one first connector.
A seventh aspect of the present invention is directed to the module system, further comprising a resistance module mounting a plurality of resistive elements having one of ends electrically connected to any of the plurality of first and second board terminals and the other end electrically connected to any of the plurality of first and second board terminals through the at least one first connector.
An eighth aspect of the present invention is directed to a module system having a plurality of semiconductor memory modules according to the first aspect of the present invention, the main surfaces of the semiconductor memory modules being opposed to each other, the module system comprising a board and a connecting structure, the semiconductor memory modules being divided into at least one first module in which the first board terminals are connected to at least one first connector mounted on the board, and at least one second module in which the second board terminals are connected to at least one second connector mounted on the board, the second board terminals of the at least one first module being connected to at least one third connector, the first board terminals of the at least one second module being connected to at least one fourth connector, the at least one third connector and the at least one fourth connector being electrically connected through the connecting structure, and the at least one first module and the at least one second module being alternately provided.
A ninth aspect of the present invention is directed to the module system, wherein the connecting structure is a connecting board for mounting the at least one third connector and the at least one fourth connector and for electrically connecting the at least one third connector and the at least one fourth connector through a wiring provided on a main surface or an inner part thereof.
A tenth aspect of the present invention is directed to the module system, wherein the at least one first module and the at least one second module are provided to make a pair such that respective main surfaces on a side where the at least one semiconductor memory is provided are turned in opposite directions.
An eleventh aspect of the present invention is directed to the module system, wherein the first and second modules are provided such that respective main surfaces on a side where the at least one semiconductor memory is provided are turned in the same direction.
A twelfth aspect of the present invention is directed to the module system, wherein the first and second modules have respective main surfaces provided perpendicularly to the main surface of the board.
A thirteenth aspect of the present invention is directed to the module system, wherein the first and second modules have respective main surfaces inclined to the main surface of the board.
According to the first aspect of the present invention, the first and second board terminals provided on the wiring board and one of the external terminals of at least one semiconductor memory are electrically connected through the wiring. Therefore, in the case in which a plurality of modules having the same structures are to be electrically connected to a signal transmission path, predetermined external terminals of at least one semiconductor memory of each module can be connected to the signal transmission path at a short distance. As a result, a branch length on the same transmission path can be decreased, a parasitic capacitance and a parasitic inductance which are incidental to the signal transmission path can be reduced, and a distortion of a signal waveform can be reduced.
According to the second aspect of the present invention, the first and second board terminals are provided in parallel with the external terminals of the semiconductor memories. Therefore, a wiring layout can be obtained efficiently.
According to the third aspect of the present invention, the semiconductor memories are arranged in a plurality of lines in parallel with each other. Therefore, a mounting density of the semiconductor memories can be enhanced.
According to the fourth aspect of the present invention, the semiconductor memory is provided on the first and second main surfaces of the wiring board. Therefore, it is possible to increase the number of the semiconductor memories to be mounted per module.
According to the fifth aspect of the present invention, the semiconductor memory modules can be electrically connected to each other at a short distance through the connection of the first connector to the first and second board terminals. As a result, the branch length on the same transmission path can be decreased, the parasitic capacitance and the parasitic inductance which are incidental to the signal transmission path can be reduced, and the distortion of the signal waveform can be reduced. Moreover, the semiconductor memory modules can be connected to each other through the first connector such that the main surface of the wiring board is present in the same plane, and the semiconductor memory modules can be connected easily. Thus, a large capacity module system can be implemented readily.
According to the sixth aspect of the present invention, the second connector is fixedly provided on one of the ends of the base. Therefore, it is possible to surely regulate the positions of the arranged semiconductor memory modules.
According to the seventh aspect of the present invention, it is possible to obtain a place of a terminating resistor for matching an output impedance of signal output means for outputting a signal to be input to the semiconductor memory module, for example, a driver circuit with a characteristic impedance of a transmission path through which the signal is transmitted, thereby reducing the distortion of the signal.
According to the eighth aspect of the present invention, the main surfaces of the semiconductor memory modules are opposed to each other, the third and fourth connectors are electrically connected through the connecting structure, and the first board terminals of the first module and the second board terminals of the second module are electrically connected to each other. Consequently, an area occupied by the module system on the board can be reduced and a module system having a small size and a large capacity can be implemented.
According to the ninth aspect of the present invention, the connecting board for electrically connecting at least one third connector and at least one fourth connector through the wiring provided on the main surface or the inner part thereof is used as the connecting structure. Therefore, a wiring length is not changed, the third and fourth connectors are fixed, and the first and second modules can be fixed reliably.
According to the tenth aspect of the present invention, the respective main surfaces of the first and second modules on the side where at least one semiconductor memory is provided are arranged to make a pair in opposite directions. Therefore, in the case in which plural sets of first and second modules are present, any signal path length between the third and fourth connectors to be electrically connected through the connecting structure can be set to be equal if an interval between the first and second connectors is equal.
According to the eleventh aspect of the present invention, the respective main surfaces of the first and second modules on the side where at least one semiconductor memory is provided are turned in the same direction. Therefore, in the case in which plural sets of first and second modules are present, both a signal path length between the third and fourth connectors to be electrically connected through the connecting structure and a signal path length between the first and second connectors of the set of adjacent first and second modules which are electrically connected through the board can be set to be equal if an interval between the first and second connectors is equal.
According to the twelfth aspect of the present invention, the respective main surfaces of the first and second modules are provided perpendicularly to the main surface of the board. Therefore, the area occupied by the module system on the board can be reduced most effectively.
According to the thirteenth aspect of the present invention, the respective main surfaces of the first and second modules are inclined to the main surface of the board. Therefore, the area occupied by the module system on the board can be reduced effectively.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.